1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit (IC) and, more particularly, to a semiconductor IC to control an address count.
2. Related Art
Generally, after selecting one word line, an address control circuit of a semiconductor IC produces a series of internal address signals through an internal counter using a column address signal, which is received from an external circuit, as an initial address signal. For example, the address control circuit counts two, four, eight, or sixteen internal address signals or the full page thereof from the received initial address signal according to a burst length. Then, the cell data is read from or written into memory cells by using the sequential internal address signals. This address counting method is called a “wrap type” method or mode because the address signals are wrapped in a predetermined unit.
The wrap type address generation mode can be classified into a sequential mode and an interleave mode that uses a complement in order to reduce toggling. The sequential mode starts the count from the initial address signal, but outputs the internal address signals in a predetermined range. For example, assuming that the internal address signals of Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 are used, the initial address is Y2, and the burst length is 4, wherein Y2, Y3, Y0, and Y1 are output by the address count in the sequential mode. Although the sequential mode is involved in the internal address generation, the sequential address signals are limited to a specific range because the address signals are wrapped in a predetermined range.